IGBTModel

Abstract

An Insulated Gate Bipolar Transistor (IGBT) model developed on a physical basis is presented. The Lumped-Charge method has been revised in order to point out a more general methodology for implementing the model into a circuit form. The model can be implemented in the popular PSpice simulator. The N-channel IGBT structure is described by means of an evolution of the PSPICE level-3 metal oxide semiconductor field effect transistor model. Simulation results agree well with the experiments both in static, switching and short circuit operations. More information can be found in [1].

Introduction

The Lumped charges are placed in the middle of the regions to be modelled and at the interface with the adjacent regions. The values of these charges are the minority carrier concentrations which are normalized to the volume of the region they belong to. The basic equations such as the junction law, the mass action law and Kirchhoff’s laws are written in terms of Lumped charges in here.

Fig. 1.Simulated NPT-IGBT structure and its simplified form from [1].

The model is subdivided into a bipolar subcircuit (e.g., based on the Lumped-Charge approach) and an unipolar subcircuit (e.g., based on a PSpice level-3 MOSFET), as illustrated in Fig. 1.

In the one-dimensional (1-D) structure of Fig. 1(b), nine charges have been placed, according to the general Lumped-Charge principles. Specifically, one charge is placed inside eachregion at the interface with the other ones, namely charges 1–2, 4–5, 7–8, and a further charge is placed into the thick regions base and body (charges 3, b and 6).

Fig. 2. IGBT model based on Lumped-Charge approach from [1].

In Fig. 2 the four-layer structure of Fig. 1(b) has been rotated and the overall equivalent IGBT circuit has been superimposed to it. Each node of the circuit indicated by numbers 1–8 is associated to each charge of Fig. 1(b).

References

[1] Iannuzzo, F, Busatto, G., "Physical CAD model for high-voltage IGBTs based on lumped-charge approach", IEEE Transactions on Power Electronics, vol. 19, pages 885-893, 2004.